Taiwan News

Destination 2D Brings Graphene to Mainstream CMOS - Breakthrough Interconnect Technology at Wafer Scale to Revolutionize Next-Generation Energy-Efficient Chips

MILPITAS, Calif., Dec. 6, 2024 /PRNewswire/ -- Destination 2D™ - a new semiconductor startup with unmatched expertise in graphene process technology - today announced it has successfully achieved ...
New Electronics

Industry’s first CMOS intelligent re-drivers set to transform AI and compute interconnects

TeraSignal has announced an intelligent re-driver solution that addresses the rapidly evolving needs for scaling AI bandwidth in data centres. The company’s new TS8401/02 intelligent 400G (4x100G) ...
Electronic Design

CMOS Plus On-Chip Electro-Optical Interconnect Zooms Past 2 Tb/s

DARPA, Intel, and Ayar Labs collaborate on developing 100-Tb/s-plus in-package silicon photonic interfaces. Ayar’s TeraPHY chiplet combines silicon photonics and CMOS in a flip-chip SiP. Thermal ...
EDN

Single-chip CMOS 100G optical interconnect debuts

Said to be the industry’s first such device, a single-chip CMOS photonics-based 100G optical interconnect targets next-generation cloud computing, data centers, and high-performance computing ...
EDN

3-D interconnect integrates CMOS ICs

Silicon bonding technology promises optimized density, power efficiency, and performance In conjunction with Raytheon Vision Systems, wafer-bonding-process developer Ziptronix (Morrisville, NC) has ...
Longview News-Journal

Destination 2D Brings Graphene to Mainstream CMOS - Breakthrough Interconnect Technology at Wafer Scale to Revolutionize Next-Generation Energy-Efficient Chips

A CMOS-compatible synthesis technology allows for the direct synthesis of graphene onto wafer-scale dielectric substrates at temperatures significantly below the CMOS thermal budget. All of this is ...