Like many of you, it’s been drilled into me by the Reuse Methodology Manual to write my state machines in VHDL as a pair of processes: a combinatorial process to compute the next state from the inputs ...

State machines are so common that there are tools devoted to creating them by drawing circles and arts. There are simulators that will recognize your state machine ...

The interest in state machines started in the 1950s when George Moore and Edward Mealy published seminal papers on formal methods of designing digital circuits, which generate outputs based on the ...

This installment starts a new segment of lessons about state machines. The subject conceptually continues the event-driven theme and is one of my favorites [1,2]. Today, you’ll learn what event-driven ...