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With PADK, users access a secure, web-based interface that facilitates real-time collaboration without requiring deep ...
Chuangfeixin’s core team secured OTP-related patents as early as 2013, with deep expertise in anti-fuse OTP technology. The anti-fuse OTP IP employs oxide-layer breakdown programming and requires no ...
In an interview published in the Korean tech medium Chosun Biz, AMD’s Senior Vice President took a clear stance on the company’s future manufacturing strategy: From AMD’s perspective, TSMC is ...
In 2010, a modest summer project at UC Berkeley sought a suitable instruction set architecture (ISA). Now, 15 years later, RISC-V is a global alternative to commercial chip architectures.
Input/Output Overload: Modern vehicles have over 90 smart sensors, 800 sensors and loads, requiring zonal MCUs to have denser ...
According to Etnews, Samsung is preparing for the future semiconductor market and plans to introduce glass substrates to improve packaging. This can be done by replacing Silicon interposers with Glass ...
However, while the spotlight often falls on design and computing power, another critical discipline ensures these chips are safe to deploy: Design for Testability (DFT). As chips grow more complex, ...
A Paradigm Shift in eFPGA Customization. Advancing Programmability in the Next Generation of SoCs . In an era of continual ...
Expedera launches its Origin Evolution NPU IP, bringing hardware acceleration to meet the computational demands of running ...
Neuromorphic systems, systems that imitate the working method of the human brain, leverage specialized hardware, such as ferroelectric devices, to execute computations more efficiently and effectively ...
Siemens is making its AI-enhanced electronic systems design technology accessible to small and mid-sized businesses (SMB) with the release of PADS Pro Essentials software and Xpedition Standard ...
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